DPRG mailing list archives: [DPRG] Motor backlash / Back EMF

Mon Jan 7 21:09:12 CST 2008

At 04:24 PM 1/7/2008, DeltaGraph at aol.com wrote:
>One problem I still have, is Scott's car uses one battery for 
>processor and one for motor.
>When motor turns on-and-off current changes in motor supply loop, 
>but not in processor loop,
>so my last email was flawed there in talking about his processor 
>loop reacting to motor current dropping to zero when relay opened 
>and adding inductive energy to processor ground.

Warning poor ascii graphics ahead ...

Yup, its always a good idea to separate your motor power from your 
processor power to avoid voltage sags (motor stall pulls its own 
battery output down), although you can achieve much of the same 
effect by using a diode/capacitor combination like so:

Battery +-----------+----|>|--------+-----> to processor PSU
                     |    D1   |     |
                     |         +     |
                     |         /     |
                   /---/     R1\     |
                  Z1 ^         /     |
                    ---        +-----|-----> Pwr Fail
                     |         |     |
                     |  R2    |/    ---
                     +-\/\/---| Q1  --- C1 (1500uF)
                              |\     |
                                |    |
                                |    |
Battery - >--------------------+----+-----> to processor ground

Note this is just pulled out of memory so breadboard it to get the 
behavior you want. Basically what this circuit does is put a diode 
between the battery and a the processor with a large capacitor. The 
idea is that if the voltage sags because of loads on the battery then 
the diode prevents the capacitor from draining back into the battery 
load and to keep on powering the processor. But its important to let 
the processor know it may have only a limited amount of time to run, 
so the PWR Fail circuit consists of a zener which is tied into the 
base of Q1 (a simple NPN like a 2n2222 or 2n3904) as long as the 
voltage is greater than Z1's breakdown, there will be a current 
conducted through R2 into the transistor and that will turn on Q1 
causing the output of PWR FAIL to be 0v, but when the battery voltage 
drops, the current stops, the transistor turns off and then R1 pulls 
PWR Fail up to "true". You can tie R1 to a logic level (5v or 3.3v) 
if you are feeding it directly into the processor.

Back to Ron's point. So the key Ron's missing is that there is stray 
or parasitic inductance in the wiring between the motor battery and 
the motors which share a common ground with the processor. When the 
motor turns off, there is a back emf surge across the inductor from 
the batteries. So think of it like this:

  +--o  o---+
  |   S1    |
  +         * TP A     +---------+
  B         |          |         |
  a        (        ---+---      |
  t         ) L1    |     |      -
  t        (        | CPU |     ---  CPU Battery
  e         |       |     |      _
  r         * TP B  ---+---     ---
  y         |          |         |
  +---------+----xx----+---------+

The inductance L1 represents the wiring inductance between the 
battery and the motor. So what happens is the motor turns off ? 
Poof!, and the inductance causes a voltage of magnitude Ldi/dt to 
appear across the inductor but *opposite* to the battery, So a 
voltage V(ba) (We'll just call it B) develops across TP A and TP B 
where B is more positive than A (the inductor is maintaining ohms law 
for us). But what that really means is that what is drawn as Circuit 
Ground above (assumed by many to be 0V), suddenly develops a slight 
DC bias. And because the ground connection is never really zero ohms 
that means that the voltage is present at the ground pin of the CPU 
by the equation V = I*R where I is the current caused by our motor's 
wiring inductance's collapsing magnetic field, and R is the 
resistance of the ground plane between any given point and a drain 
for the current (either battery works). The net result is that the 
CPU sees a positive voltage B on its ground pin (which is still much 
smaller hopefully than the CPU power pin or latchup will ensue) but 
the net power it sees is (Vdd - B) which, if it persists long enough, 
can be small enough to trigger the brownout circuit.

There are lots of ways to address these kinds of issues, my earlier 
suggestion to put and inductor at XX is to create a higher impedance 
back to the CPU and thus keep the voltage rise confines to the ground 
plane of the motor side, alternatively you can turn the motor off 
more gradually (remember its the di/dt that kills you, the wiring 
inductance is usually pretty small), or you can put a decoupling 
capacitor right next to the CPU which will "ride" the ground bounce 
effectively offsetting the voltage B appearing on the ground plane by 
raising the effective voltage Vdd that the CPU is seeing.

Is that more clear?

--Chuck